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ISTC-CC Abstract
A case for toggle-aware compression for GPU systems
HPCA 2016: 188-200 22nd IEEE Symposium on High Performance Computer Architecture, Barcelona, Spain, March 12-16 2016.
Gennady Pekhimenko, Evgeny Bolotin*, Nandita Vijaykumar, Onur Mutlu, Todd C. Mowry, Stephen W Keckler*^
Carnegie Mellon University
*NVIDIA
^University of Texas at Austin
Data compression can be an e ective method to achieve higher system performance and energy e ciency in modern dataintensive applications by exploiting redundancy and data similarity. Prior works have studied a variety of data compression techniques to improve both capacity (e.g., of caches and main memory) and bandwidth utilization (e.g., of the on-chip and off -chip interconnects). In this paper, we make a new observation about the energy-e ciency of communication when compression is applied. While compression reduces the amount of transferred data, it leads to a substantial increase in the number of bit toggles (i.e., communication channel switchings from 0 to 1 or from 1 to 0). The increased toggle count increases the dynamic energy consumed by on-chip and off -chip buses due to more frequent charging and discharging of the wires. Our results show that the total bit toggle count can increase from 20% to 2.2× when compression is applied for some compression algorithms, averaged across di fferent application suites. We characterize and demonstrate this new problem across 242 GPU applications and six diff erent compression algorithms. To mitigate the problem, we propose two new toggle-aware compression techniques: Energy Control and Metadata Consolidation. These techniques greatly reduce the bit toggle count impact of the data compression algorithms we examine, while keeping most of their bandwidth reduction benefits.
FULL PAPER: pdf
