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ISTC-CC Abstract
HeteroCheckpoint: Efficient Checkpointing for Accelerator-Based Systems
Proceedings of International Conference on Dependable Systems and Networks (DSN’14), June 2014.
Sudarsun Kannan, Naila Farooqui, Ada Gavrilovska, Karsten Schwan
Georgia Institute of Technology
Moving toward exascale, the number of GPUs in HPC machines is bound to increase, and applications will spend increasing amounts of time running on those GPU devices. While GPU usage has already led to substantial speedup for HPC codes, their failure rates due to overheating are at least 10 times higher than those seen for the CPUs now commonly used on HPC machines. This makes it increasingly important for GPUs to have robust checkpoint/restart mechanisms. This paper introduces a unified CPU-GPU checkpoint mechanism, which can efficiently checkpoint the combined GPU-CPU memory state resident on machine nodes. Efficiency is gained in part by addressing the end-to-end data movements required for checkpointing – from GPU to storage – by introducing novel pre-copy and checksum methods. These methods reduce checkpoint data movement cost seen by HPC applications, with initial measurements using different benchmark applications showing up to 60% reduced checkpoint overhead. Additional exploration of the use of nextgeneration storage, like NVM, show further promises of reduced checkpointing overheads.
FULL PAPER: pdf
