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ISTC-CC Abstract
SIMD Re-Convergence At Thread Frontiers
MICRO'11, December 3-7, 2011, Porto Alegre, Brazil.
Gregory Diamos, Benjamin Ashbaugh*, Subramaniam Maiyuran*, Andrew Kerr, Haicheng Wu, Sudhakar Yalamanchili
Georgia Institute of Technology
*Intel Visual Computing Group Folsom, CA
Hardware and compiler techniques for mapping data-parallel programs with divergent control ow to SIMD architectures have recently enabled the emergence of new GPGPU programming models such as CUDA, OpenCL, and DirectX Compute. The impact of branch divergence can be quite different depending upon whether the program's control ow is structured or unstructured. In this paper, we show that unstructured control ow occurs frequently in applications and can lead to signicant code expansion when executed using existing approaches for handling branch divergence.
This paper proposes a new technique for automatically mapping arbitrary control ow onto SIMD processors that relies on a concept of a Thread Frontier, which is a bounded region of the program containing all threads that have branched away from the current warp. This technique is evaluated on a GPU emulator congured to model i) a commodity GPU (Intel Sandybridge), and ii) custom hardware support not realized in current GPU architectures. It is shown that this new technique performs identically to the best existing method for structured control ow, and re-converges at the earliest possible point when executing unstructured control ow. This leads to i) between 1:5 633:2% reductions in dynamic instruction counts for several real applications, ii) simplication of the compilation process, and iii) ability to eciently add high level unstructured programming constructs (e.g., exceptions) to existing data-parallel languages.
FULL PAPER: pdf